Menu
11
About Us
Administration
Academic Programme
Academic Calendar
Approved List of Journals
Downloads
Format for UG PG and PhD Theses
Institute Funding Projects for Students
Notices
Ordinance and Regulations
PG
PhD
Time Table
UG
Admissions
Student Affairs
Departments
Architecture and Planning
Bioengineering and Biotechnology
Center for Food Engineering and Technology
Centre for Quantitative Economics and Data Science
Chemical Engineering
Chemistry
Civil and Env Engineering
Computer Science and Engg
Electrical and Electronics Engg
Electronics and Communication Engg
Hotel Management and Catering Tech
Humanities and Social Science
Management
Mathematics
Mechanical Engineering
Pharmaceutical Sciences and Tech
Physics
Production and Industrial Engineering
Remote Sensing
Space Engineering and Rocketry
Facilities
Placement
Students
Current Students
GP Birla Scholarship
Graduated Student Services
Rules and Regulations
Student Affairs
Alumni
Examination
R & D Cell
5
Career
Recruitment Advertisement
Why work with us
1
Tender
About Us
Administration
Academic Programme
UG
PG
PhD
Academic Calendar
Time Table
Ordinance and Regulations
Notices
Downloads
Format for UG PG and PhD Theses
Institute Funding Projects for Students
Approved List of Journals
Admissions
Student Affairs
Departments
Architecture and Planning
Bioengineering and Biotechnology
Chemical Engineering
Center for Food Engineering and Technology
Chemistry
Civil and Env Engineering
Computer Science and Engg
Centre for Quantitative Economics and Data Science
Electrical and Electronics Engg
Electronics and Communication Engg
Hotel Management and Catering Tech
Humanities and Social Science
Management
Mathematics
Mechanical Engineering
Pharmaceutical Sciences and Tech
Physics
Production and Industrial Engineering
Remote Sensing
Space Engineering and Rocketry
Facilities
Placement
Students
Rules and Regulations
Current Students
Graduated Student Services
Student Affairs
GP Birla Scholarship
Alumni
Examination
R & D Cell
10
Career
Recruitment Advertisement
Why work with us
1
Tender
Home
Contact Address
Professional Backgroud
Training
Book Publications
Faculty Training
Workshop Organized
Software Skills
Research Areas
Taught Subjects
Contribution in ESDM
Vijay Nath
Important Links
Publications Details
Membership
Honors and Awards
Invited Lectures
Advisers
Reviewers
External Examiners
Guiding Ph D Students
Guiding B Tech Students
Guiding M Tech Students
Sponsored Projects
Adviser Students' Chapter IEI
VLSI Design Lab
Administrative Responsibilities
Research Corners
Contact Us
Email - vijaynath@bitmesra.ac.in
Phone - 9973886214
External Examiners
I was appointed as external examiner for a subject of “Digital Logic Design” of
BE forth
semester, Lab-Exam, in
MMM Engineering College Gorakhpur
under U.P. Technical University on 31-May-2007.
I was appointed as external examiner for a “Final Project viva-voce of
Diploma in Electronics
Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 15-May-2008.
I was appointed as external examiner for a “Final Project viva-voce of
“Diploma in Electronics
Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 10-May-2009.
I was appointed as external examiner for a “Final Project viva-voce of
Diploma in Electronics
Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 06-May-2010.
I was appointed paper setter & examiner viva voce for
B.Sc. II
, Dept. of Computer Science, Dept. of Physics,
D.D.U. Gorakhpur University
Gorakhpur
in 2010.
I was appointed paper setter & examiner for
B.Sc. III, Dept. of Computer Science
, Dept. of Physics,
DDU Gorakhpur University Gorakhpur
in 2011.
I was appointed External examiner for a “
Ph.D. (Embedded System) viva voce,
Department of Computer Science,
Mumbai University Mumbai
, India on 13 July 2011.
I was appointed paper setter & examiner for B.Sc. III, Dept. of Computer Science, Dept. of Physics,
DDU Gorakhpur University Gorakhpur
(Exam-2012).
I was appointed External Examiner for B.E. Final Year, Dept. of ECE,
BIT Sidiri, (
JH) 23-March-2012.
I was appointed as external examiner for a “Final Project viva-voce of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 01-May-2012.
I was appointed External Examiner for B.E. Third Year, Dept. of ECE,
BIT Sidiri,
JH, 03-Nov.2012.
I was appointed External Examiner for “Final Project viva-voce of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 01-May-2013.
I was appointed External examiner for a
Ph.D. (Digital VLSI Design) viva voce,
Department of Electronics &Communication Engineering,
Samabalpur University, Burla
, Orissa, India on 11-12
th
June 2013.
I was appointed External examiner for a “M
.Tech (VLSI Design) viva voce,
Department of Electronics & Communication Engineering,
ITM, Gwalier
, (MP) on 20
th
April-2014.
I was appointed External examiner for a “
Ph.D. (Instrumentation & Measurement System) viva voce,
Department of Electronics & Communication Engineering,
Anna University, Chennai
, Tamilnadu on 10
th
May-2014.
I was appointed External examiner for a “M.Tech.
(VLSI System Design) viva voce,
Department of Electronics & Communication Engineering,
Gujrat Technical University(GTU)
Ahamdabad 10
th
April 2015.
I was appointed External Examiner for “Final Project viva-voice of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 6
th
May-2015.
I was appointed External examiner for a “
Ph.D. (Embedded System) viva voce,
Department of Computer Science & Engineering,
Anna University, Chennai
, Tamilnadu on 14
th
July-2016.
I was appointed External Examiner for “Final Project viva-voce of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 05th May-2017.
I was appointed External Examiner for “Final Project viva-voce of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 10th May-2018.
I was appointed External Examiner for “Final Project viva-voce of Diploma in Electronics Engineering” in University Polytechnic,
Birla Institute of Technology
, Mesra, Ranchi, 10th May-2019.
I was appointed External examiner for a “
Ph.D. (Robotics System) viva voce,
Department of Computer Science & Engineering,
UPES
University, Deharadun
, UK on 10
th
Jan-2020.