Training Experince

S.N.

Organization / Employer

       Purpose

Period

1.

CEERI- PILANI, India

 

Project Trainee

 

31th-June, 2001 to 20th March-2002

2.

CADENCE Company,

Bangalore, India

VLSI Design

(For Lab Setup in BIT)

5 days training (21 -25th May-2007).

3.

VLSI Signal Processing

IIT Kharagpur, India

Academic Improvement

 

5 days training (29th Dec-2007 to 5th Jan-2007).

4.

Embedded System Design

CG Corel Company, Bangalore, India

Academic Improvement

 

15 days

 

5.

INUP-2009, Nano Technology,

IIT, Bombay, India.

 

For Project Collaboration

 

5 days

 

6.

Pedagogy Training

 

For the development of teaching skills

5 days

 

7.

INUP-2010, Hands on Training in Nano Fabrication Technology,

IIT, Bombay, India

 

Training for the fabrication of Nanobiosensors for early stage detection of cancer.

5 days (5th July-2010 to 10th July-2010)

 

8.

Mission10x

Vipro Group,

Bangalore.

For the development of high skill teaching impact.

5 days (25th-29th Nov-2010)

 

9.

NPTEL workshop

IIT Kharagpur

 

 

Review course developed by IITies for open source.

18-19th Feb.2011

 

10.

Mission10x Vipro Group

 

DALE CARNIGIE Certification.

  9th-14th March-2011

11.

Faculty Upgradation Program

IIT Kharagpur

23-28th  Dec.2011

12.

Advanced VLSI Signal Processing

IIT Kharagpur, India

Academic Improvement

 

2-7th Dec.2013

13.

Advanced VLSI Signal Processing

IIT Kharagpur, India

Academic Improvement

 

2-6th January,2015

   14 CMOS Mixed Signal and Radio Frequency VLSI Design Conducted by Indian Institute of Technology Kharagpur at Birla Institute of Technology Mesra Ranchi 26th Dec2016 to 4th Feb.2017
   15 Modeling & Simulation of Nano Transistors Indian Institute of Technology, Kanpur 13-17th Feb 2017
   16